LMK105SD472KV-V [TAIYO YUDEN]

Ceramic Capacitor, Multilayer, Ceramic, 10V, 10% +Tol, 10% -Tol, SD, 0.0047uF, Surface Mount, 0402, CHIP, ROHS COMPLIANT;
LMK105SD472KV-V
型号: LMK105SD472KV-V
厂家: TAIYO YUDEN (U.S.A.), INC    TAIYO YUDEN (U.S.A.), INC
描述:

Ceramic Capacitor, Multilayer, Ceramic, 10V, 10% +Tol, 10% -Tol, SD, 0.0047uF, Surface Mount, 0402, CHIP, ROHS COMPLIANT

文件: 总15页 (文件大小:1772K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
超低歪積層セラミックコンデンCFCAP®)  
SUPER LOW DISTORTION MULTILAYER CERAMIC  
®
CAPACITORS  
(CFCAP )  
OPERATING TEMP.  
55125℃  
特長ꢀFEATURES  
新規開発った誘電体材料使用れた温度特性内部電極Niを  
いることで高容コストを実現しました  
低歪ショックノイズでアナログ回路携帯機器のデジタル回路  
最適です  
耐熱性耐破壊電圧機械的強度くフィルムコンデンサのえ  
最適です  
Newly developed dielectric material and the use of nickel for internal  
electrodes provide excellent temperature characteristics with high ca-  
pacitance, small case size and low cost.  
Low distortion and low shock noise make these capacitors well suited  
for use in analog or digital mobile devices.  
Excellent heat-resistance, high break down voltage, and mechanical  
strength make these capacitors well suited for replacing film capacitors.  
用途ꢀAPPLICATIONS  
AV関連機器などの信  
号回路  
のカップリング用途  
携帯電話PLL回路  
Signal line for AV products  
アナログ信  
Analog signal coupling applications  
PLL circuit of mobile phones  
良好温度特性による時定数回路発信  
回路フィルタなど  
Good temperature characteristics for time constant circuits, oscillation  
circuits and filters  
形名表記法ꢀORDERING CODE  
1
3
5
7
9
端子電極  
シリーズ記号  
容量許容差  
別仕様  
定格電VDC〕  
U
G
T
50  
35  
25  
16  
10  
K
メッキSD スタンダード  
K ±10 %  
標準  
10  
4
6
8
E
L
包装  
T
F
形状寸EIAL×Wmm)  
公称静電容μF)  
製品  
mm)  
223  
104  
リールテーピン4mmピッチ)  
リールテーピン2mmピッチ)  
1050402)  
1070603)  
2120805)  
3161206)  
1.0×0.5  
1.6×0.8  
2.0×1.25  
3.2×1.6  
V
A
D
F
0.5  
0.8  
0.022  
0.1  
2
0.85  
シリーズ名  
1.15  
1.25  
1.6  
11  
M
積層コンデンサ  
G
L
当社管理記号  
標準品  
○=スペース  
_
T M K 3 1 6 S D 1 0 4 K L  
T  
6
1
2
3
4
5
7
8
9
10  
11  
1
3
5
7
9
Special code  
End termination  
Series Symbol  
SD  
Capacitance tolerances)  
Rated voltageVDC〕  
U
G
T
E
L
50  
35  
25  
16  
10  
K
Plated  
K
±10  
Standard products  
Standard  
10  
Packaging  
4
6
8
Dimensions(case size)mm)  
Nominal capacitanceμF)  
example  
223  
104  
Thicknessmm)  
T
F
Tape & reel 4mm pitches)  
Tape & reel 2mm pitches)  
1050402)  
1070603)  
2120805)  
3161206)  
1.0×0.5  
1.6×0.8  
2.0×1.25  
3.2×1.6  
V
A
D
F
G
L
0.5  
0.8  
0.85  
1.15  
1.25  
1.6  
0.022  
0.1  
2
Series name  
11  
Multilayer ceramic  
capacitors  
Internal code  
M
Standard products  
Blank space  
68  
外形寸法ꢀEXTERNAL DIMENSIONS  
TypeEIA)  
L
W
T
e
MK105  
(0402)  
MK107  
(0603)  
1.0±0.05  
0.5±0.05  
0.5±0.05  
0.25±0.10  
0.010±0.004)  
0.35±0.25  
V
A
D
G
F
0.039±0.0020.020±0.002) (0.020±0.002)  
1.6±0.10  
0.8±0.10  
0.8±0.10  
0.063±0.0040.031±0.004) (0.031±0.004)  
0.85±0.10  
0.014±0.010)  
MK212  
(0805)  
2.0±0.10  
0.079±0.0040.049±0.004)  
1.25±0.10  
0.033±0.004)  
1.25±0.10  
0.5±0.25  
0.020±0.010)  
0.049±0.004)  
1.15±0.10  
4
0.35  
MK316  
(1206)  
3.2±0.15  
0.126±0.0060.063±0.006)  
1.6±0.15  
0.045±0.004)  
1.6±0.20  
0.500000  
0.25  
0.020ꢀꢀꢀ)  
0.014  
0.010  
L
0.063±0.008)  
Unitmm (inch)  
概略バリエーションAVAILABLE CAPACITANCE RANGE  
Type  
Temp.Char  
VDC  
[pF:3digits]  
391  
471  
561  
681  
821  
102  
122  
152  
182  
222  
272  
332  
392  
105  
SD  
107  
SD  
212  
SD  
316  
SD  
Cap  
[μF]  
50V  
25V  
16V  
10V  
50V  
25V  
16V  
10V  
50V  
35V  
16V  
10V  
35V  
25V  
0.00039  
0.00047  
0.00056  
0.00068  
0.00082  
0.001  
0.0012  
0.0015  
0.0018  
0.0022  
0.0027  
0.0033  
0.0039  
0.0047  
0.0056  
0.0068  
0.0082  
0.01  
V
V
V
V
V
V
V
A
A
A
A
A
A
A
V
V
V
V
V
V
V
A
A
D
D
D
D
D
D
472  
562  
682  
822  
A
A
A
A
103  
0.012  
0.015  
0.018  
0.022  
123  
153  
183  
223  
D
D
G
G
G
A
A
A
A
0.027  
273  
0.033  
0.039  
333  
393  
D
F
F
0.047  
0.056  
0.068  
0.082  
473  
563  
683  
823  
D
F
F
F
L
L
G
G
G
0.1  
104  
グラフ記号製品  
みをします。  
Letters in the table indicate thickness.  
シリーズコード  
静電容量許容〕  
tanδ〕  
Series Code  
Capacitance tolerance  
Dissipation factor  
SD  
±10K)  
0.1max.  
セレクションガイド  
アイテム一覧  
特性図  
梱包  
頼性 使用上注意  
Selection Guide  
Part Numbers  
Electrical Characteristics  
Packaging  
Reliability Data  
Precautions  
P.10  
P.70  
P.71  
P.98  
P.72  
P.108  
69  
アイテム一覧 PART NUMBERS  
105TYPE0402 case size)  
定ꢀ格  
EHS  
公ꢀꢀ称  
温度特性  
tanδ  
実装条件  
静電容量  
許 容 差  
形ꢀꢀ名  
電ꢀ圧  
厚 ꢀみ  
Environmental 静電容量  
Temperature Dissipation Soldering method  
Hazardous Capacitance characteristics  
factor  
R:ロー Reflow soldering Capacitance Thickness  
Rated Voltage  
Ordering code  
Substances)  
〔μF〕  
Standard type %Max. W:ロー Wave soldering tolerance mminch)  
UMK105 SD391KV  
UMK105 SD471KV  
UMK105 SD561KV  
TMK105 SD681KV  
TMK105 SD821KV  
TMK105 SD102KV  
TMK105 SD122KV  
EMK105 SD152KV  
EMK105 SD182KV  
EMK105 SD222KV  
EMK105 SD272KV  
LMK105 SD332KV  
LMK105 SD392KV  
LMK105 SD472KV  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
0.00039  
0.00047  
0.00056  
0.00068  
0.00082  
0.0010  
0.0012  
0.0015  
0.0018  
0.0022  
0.0027  
0.0033  
0.0039  
0.0047  
50V  
25V  
0.5±0.05  
0.020±0.002)  
±10*  
Standard type  
0.1  
R
16V  
10V  
*J±5%も対応しまださꢀꢀ*The product with "J" tolerance of ±5% is also available. Please contact our local sales.  
107TYPE0603 case size)  
定ꢀ格  
電ꢀ圧  
EHS  
公ꢀꢀ称  
温度特性  
tanδ  
実装条件  
静電容量  
許 容 差  
形ꢀꢀ名  
厚 ꢀみ  
Environmental 静電容量  
Temperature Dissipation Soldering method  
Hazardous Capacitance characteristics  
factor  
R:ロー Reflow soldering Capacitance Thickness  
Rated Voltage  
Ordering code  
Substances)  
〔μF〕  
Standard type %Max. W:ロー Wave soldering tolerance mminch)  
UMK107 SD102KA  
UMK107 SD122KA  
UMK107 SD152KA  
UMK107 SD182KA  
UMK107 SD222KA  
UMK107 SD272KA  
UMK107 SD332KA  
TMK107 SD392KA  
TMK107 SD472KA  
EMK107 SD562KA  
EMK107 SD682KA  
EMK107 SD822KA  
EMK107 SD103KA  
LMK107 SD123KA  
LMK107 SD153KA  
LMK107 SD183KA  
LMK107 SD223KA  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
0.0010  
0.0012  
0.0015  
0.0018  
0.0022  
0.0027  
0.0033  
0.0039  
0.0047  
0.0056  
0.0068  
0.0082  
0.010  
50V  
0.8±0.1  
0.031±0.004)  
25V  
16V  
±10*  
Standard type  
0.1  
R
0.012  
0.015  
0.018  
0.022  
10V  
*J±5%も対応しまださꢀꢀ*The product with "J" tolerance of ±5% is also available. Please contact our local sales.  
212TYPE0805 case size)  
定ꢀ格  
電ꢀ圧  
EHS  
公ꢀꢀ称  
温度特性  
tanδ  
実装条件  
静電容量  
許 容 差  
形ꢀꢀ名  
厚 ꢀみ  
Environmental 静電容量  
Temperature Dissipation Soldering method  
Hazardous Capacitance characteristics  
factor  
R:ロー Reflow soldering Capacitance Thickness  
Rated Voltage  
Ordering code  
Substances)  
〔μF〕  
Standard type %Max. W:ロー Wave soldering tolerance mminch)  
UMK212 SD392KD  
UMK212 SD472KD  
UMK212 SD562KD  
UMK212 SD682KD  
UMK212 SD822KD  
UMK212 SD103KD  
GMK212 SD123KD  
GMK212 SD153KD  
GMK212 SD183KG  
GMK212 SD223KG  
GMK212 SD273KG  
EMK212 SD333KD  
LMK212 SD473KD  
LMK212 SD683KG  
LMK212 SD823KG  
LMK212 SD104KG  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
0.0039  
0.0047  
0.0056  
0.0068  
0.0082  
0.01  
0.012  
0.015  
0.018  
0.022  
0.027  
0.033  
0.047  
0.068  
0.082  
0.1  
50V  
0.85±0.1  
0.033±0.004)  
Standard type  
0.1  
R
±10*  
35V  
1.25±0.1  
0.049±0.004)  
0.85±0.1  
0.033±0.004)  
16V  
10V  
1.25±0.1  
0.049±0.004)  
*J±5%も対応しまださꢀꢀ*The product with "J" tolerance of ±5% is also available. Please contact our local sales.  
316TYPE1206 case size)  
定ꢀ格  
電ꢀ圧  
EHS  
公ꢀꢀ称  
温度特性  
tanδ  
実装条件  
静電容量  
許 容 差  
形ꢀꢀ名  
厚 ꢀみ  
Environmental 静電容量  
Temperature Dissipation Soldering method  
Hazardous Capacitance characteristics  
factor  
R:ロー Reflow soldering Capacitance Thickness  
Rated Voltage  
Ordering code  
Substances)  
〔μF〕  
Standard type %Max. W:ロー Wave soldering tolerance mminch)  
GMK316 SD333KF  
GMK316 SD393KF  
TMK316 SD473KF  
TMK316 SD563KF  
TMK316 SD683KF  
TMK316 SD823KL  
TMK316 SD104KL  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
RoHS  
0.033  
0.039  
0.047  
0.056  
0.068  
0.082  
0.1  
35V  
1.15±0.1  
0.045±0.004)  
±10*  
Standard type  
0.1  
R
25V  
1.6±0.2  
0.063±0.008)  
*J±5%も対応しまださꢀꢀ*The product with "J" tolerance of ±5% is also available. Please contact our local sales.  
70  
容量温度特性 Capacitance-temperature characteristics  
20  
15  
10  
SD : Standard Type  
5
0
-
5
-
10  
-
15  
-
20  
4
-
60  
-
-
40 20  
0
20  
40 60  
80 100 120  
71  
梱包ꢀPACKAGING  
①最小受注単位数 Minimum Quantity  
■テーピン梱包ꢀ Taped packagingꢀ  
標準数量  
製品  
厚 み  
Standard quantity  
[ pcs ]  
EIA)  
Thickness  
Type  
紙テープ ボステープ  
code  
mminch)  
paper  
Embossed tape  
MK042 01005  
0.20.008)  
0.30.012)  
0.30.012)  
0.450.018)  
0.30.012)  
C
P
15000  
̶
MK0630201)  
15000  
10000  
10000  
10000  
̶
̶
̶
̶
P
2K096 0302)  
K
WK1050204)  
MK1050402)  
VK1050402)  
P
V, W  
W
K
0.50.020)  
0.450.018)  
0.50.020)  
4000  
̶
4000  
V
̶
MK1070603)  
WK107 0306)  
A
0.80.031)  
4000  
̶
Z
4000  
4000  
4000  
4000  
4000  
̶
4000  
4000  
4000  
̶
̶
̶
̶
̶
3000  
̶
̶
0.50.020)  
0.80.031)  
0.60.024)  
0.450.018)  
0.850.033)  
1.250.049)  
0.850.033)  
0.850.033)  
0.850.033)  
1.150.045)  
1.250.049)  
1.60.063)  
0.850.033)  
1.150.045)  
1.50.059)  
1.90.075)  
2.0max 0.079)  
2.50.098)  
2.50.098)  
V
A
2K110 0504)  
B
K
MK2120805)  
WK212 0508)  
D
G
D
D
D
F
4K212 0805)  
2K212 0805)  
̶
MK3161206)  
WK316 0612)  
̶
̶
3000  
2000  
※□WK  
G
L
D
F
バルクカセットBulk Cassette  
̶
2000  
H
N
Y
MK3251210)  
MK4321812)  
̶
̶
̶
2000  
500,1000  
500  
M
M
プレスポケットタイプは  
ボトムテープ。  
テーピング材質ꢀTaping material  
Unitmminch)  
105, 107, 212形状個  
別対応致しますのでおさい。  
Please contact any of our offices for accepting your requirement accord-  
ing to dimensions 0402, 0603, 0805.(inch)  
※□WK  
98  
梱包ꢀPACKAGING  
テーピング寸法ꢀTaping dimensionsꢀ  
ꢀ紙テープPaper Tape8mm0.315inches wide)  
エンボステープEmbossed tape8mm0.315inches wide)  
部品  
挿入角穴  
4
T1  
2.0±0.05 2.0±0.05  
挿入部  
挿入ッチ  
み  
Type  
Chip Cavity  
Insertion Pitch Tape Thickness  
)  
T1  
チップ挿入部  
Chip cavity  
挿入ピッチ テープみ  
0.25  
0.010)  
0.45  
2.0±0.05  
0.36max.  
0.27max.  
Type  
MK04201005)  
MK0630201)  
WK1050204)  
Insertion Pitch Tape Thickness  
0.0180.079±0.002) (0.014) (0.011)  
EIA)  
A
B
F
K
T
0.37  
0.016)  
0.67  
2.0±0.05  
0.45max.  
0.42max.  
1.0  
1.8  
1.3max. 0.25±0.1  
0.0270.079±0.002) (0.018) (0.017)  
WK1070306)  
MK2120805)  
MK3161206)  
0.039) (0.071)  
1.655 2.4  
0.065) (0.094)  
2.0 3.6  
0.079) (0.142)  
0.051max.0.01±0.004)  
0.65  
0.026)  
1.15  
2.0±0.05  
0.45max 0.42max  
0.0450.079±0.0020.018max0.017max)  
4.0±0.1  
Unitmminch)  
0.157±0.0043.4max. 0.6max.  
0.134max.0.024max.)  
部品  
挿入角穴  
2.8  
3.6  
MK3251210)  
0.110) (0.142)  
Unitmminch)  
エンボステープEmbossed tape12mm0.472inches wide)  
2.0±0.05 2.0±0.05  
チップ挿入部  
Chip Cavity  
挿入ピッチ テープみ  
Type  
Insertion Pitch Tape Thickness  
EIA)  
A
B
F
T
0.72  
0.028)  
0.655  
1.02  
52.0±0.05 0.45max.(0.018max)  
2K0960302)  
MK1050402)  
0.0400.079±0.0020.6max.(0.024max)  
1.155  
52.0±0.05  
0.8max.  
VK1050402) (0.026)  
0.0450.079±0.0020.031max.)  
Unitmminch)  
チップ挿入部  
Chip cavity  
挿入ピッチ テープみ  
Type  
Insertion Pitch Tape Thickness  
EIA)  
A
B
F
K
T
3.7  
4.9  
8.0±0.1  
4.0max. 0.6max.  
MK4321812)  
0.146)  
0.1930.315±0.0040.157max.)(0.024max.)  
Unitmminch)  
チップ挿入部  
Chip Cavity  
挿入ピッチ テープみ  
Type  
Insertion Pitch Tape Thickness  
EIA)  
A
B
F
T
MK107 0603)  
WK107 0306)  
1.0  
1.8  
4.0±0.1  
1.1max.  
0.039)  
1.15  
0.0710.157±0.004) (0.043max.)  
1.55  
4.0±0.1  
1.0max.  
2K1100504)  
0.045)  
0.0610.157±0.004) (0.039max.)  
MK2120805)  
WK2120508)  
1.655  
2.4  
4K2120805) (0.065)  
2K2120805)  
0.094)  
4.0±0.1  
1.1max.  
0.157±0.004) (0.043max.)  
MK3161206)  
WK3160612)  
2.0  
3.6  
0.079)  
0.142)  
Unitmminch)  
99  
梱包ꢀPACKAGING  
リーダー空部ꢀLeader and Blank portionꢀ  
160mm以上  
6.3inches or more  
100mm以上  
3.94inches or more)  
引き出し向  
Direction of tape feed  
400mm以上  
15.7inches or more)  
リール寸法ꢀReel sizeꢀ  
トップテープ強度ꢀTop Tape Strengthꢀ  
トップテープのはがし下図矢印方向にて0.10.7Nとなります。  
The top tape requires a peel-off force of 0.10.7N in the direction of the  
arrow as illustrated below.  
100  
RELIABILITY DATA  
1/2  
Super Low Distortion Multilayer Ceramic CapacitorsCFCAP)  
Item  
Specified Value  
Test Methods and Remarks  
1.Operating Temperature Range  
2.Storage Temperature Range  
3.Rated Voltage  
55 to 125℃  
55 to 125℃  
10VDC, 16VDC, 25VDC, 35VDC, 50VDC,  
No breakdown or damage  
4
4.Withstanding Voltage  
Between terminals  
Applied voltage: Rated voltage×3  
Duration: 1 to 5 sec.  
Charge/discharge current: 50mA max.  
Applied voltage: Rated voltage  
Duration: 60±5 sec.  
5.Insulation Resistance  
10000 MΩ or 500MΩμF, whichever is smaller  
Charge/discharge current: 50mA max.  
Measuring frequency1Hz±10%  
Measuring voltage1±0.2Vrms  
Bias application: None  
6.CapacitanceTolerance)  
±10%  
7.Tangent of Loss Angle  
tan δ)  
0.1%  
max  
Measuring frequency1Hz±10%  
Measuring voltage1±0.2Vrms  
Bias application: None  
8.Resistance to Flexure of  
Appearance: No abnormality  
Warp: 1mm  
Substrate  
Capacitance change: ±5%  
Speed: 0.5mm/second  
Duration:10 seconds  
The measurement shall be made with the board in the bent position.  
R-230  
9. Body strength  
10. Adhesion of electrode  
No separation or indication of separation of electrode.  
Applied force: 5N  
Duration: 30 ±5 seconds  
11. Solderability  
At least 95% of terminal electrode is covered by new solder.  
Solder temp.: 230 ±5℃  
Duration: 4 ±1 seconds  
12. Resistance to soldering  
Apppearance: No abnormality  
Solder temp.: 270 ±5℃  
Capacitance change: ±2.5% max.  
tanδ: Initial value  
Duration: 3 ±0.5 seconds  
Preheating conditions: 80 to 100, 2 to 5 min. or 5 to 10 min.  
150 to 200, 2 to 5 min. or 5 to 10 min.  
Recovery: Recovery for the following period under the  
standard condition after the test: 24 ±2hrs  
Insulation resistance: Initial value  
Withstanding voltagebetween terminals: No abnormality  
13. Thermal shock  
Appearance: No abnormality  
Conditions for 1 cycle:  
+0  
Capacitance change: ±2.5% max  
tanδ: Initial value  
Step 1: Minimum operating temperature30±3 minutes  
3
Step 2: Room temperature  
2 to 3min.  
Step 3: Maximum operating temperature30±3 minutes  
0
+3  
Insulation resistance: Initial value  
Withstanding voltagebetween terminals: No abnormality  
Step 4: Room temperature  
Number of cycles: 5 times  
Recovery after the test: 24±2hrs  
Temperature:40±2℃  
2 to 3min.  
14. Damp heatsteady state)  
Appearance: No abnormality  
Capacitance change: ±5% max  
tanδ: 0.5% max  
Humidity:90 to 95% RH  
+24  
Duration:500 hrs  
0
Insulation resistance 50MΩμF or 1000MΩ whichever is smaller  
Recovery: Recovery for the following period under the stan-  
dard condition after the removal from test chamber: 24 ±2hrs  
73  
RELIABILITY DATA  
2/2  
Super Low Distortion Multilayer Ceramic CapacitorsCFCAP)  
Item  
Specified Value  
Test Methods and Remarks  
15.Loading under Damp Heat  
Appearance: No abnormality  
According to JIS C 5102 clause 9.9.  
Temperature:40±2℃  
Capacitance change: ±7.5% max  
tanδ0.5% max  
Humidity:90 to 95% RH  
4
+24  
Insulation resistance: 25MΩμF or 500MΩ whichever is smaller  
Duration:500hrs  
0
Applied voltage: Rated voltage  
Charge/discharge current:50mA max  
Recovery: Recovery for the following period under the stan-  
dard condition after the removal from test chamber: 24±2hrs  
16.Loading at High Tempera-  
Appearance: No abnormality  
According to JIS C 5102 clause 9.9.  
ture  
Capacitance change: ±3% max  
Temperature:125±3℃  
+48  
tanδ0.35% max  
Duration:1000  
hrs  
0
Insulation resistance: 50MΩμF or 1000MΩ whichever is smaller  
Applied voltage: Rated voltage x 2  
Recovery: Recovery for the following period under the stan-  
dard condition after the removal from test chamber: 24±2hrs  
Note on standard condition: "standared condition" referred to herein is defined as follows.  
Temperature: 5 to 35, Relative humidity: 45 to 85 %, Air pressure: 86 to 106kpa,  
When there are questions concerning measurement results: In order to provide correlation data, the test shall be conducted under condition.  
Temperature: 20±2, Relative humidity: 60 to 70 %, Air pressure: 86 to 106kpa  
Unless otherwise specified,all the tests are conducted under the "standard condition."  
75  
PRECAUTIONS  
1/6  
Precautions on the use of Multilayer Ceramic Capacitors  
Stages  
Precautions  
Technical considerations  
1.Circuit Design  
Verification of operating environment, electrical rating and per-  
formance  
1. A malfunction in medical equipment, spacecraft, nuclear  
reactors, etc. may cause serious harm to human life or have  
severe social ramifications. As such, any capacitors to be  
used in such equipment may require higher safety and/or  
reliability considerations and should be clearly differentiated  
from components used in general purpose applications.  
4
Operating VoltageVerification of Rated voltage)  
1. The operating voltage for capacitors must always be lower  
than their rated values.  
If an AC voltage is loaded on a DC voltage, the sum of the  
two peak voltages should be lower than the rated value of  
the capacitor chosen. For a circuit where both an AC and a  
pulse voltage may be present, the sum of their peak voltages  
should also be lower than the capacitor's rated voltage.  
2. Even if the applied voltage is lower than the rated value, the  
reliability of capacitors might be reduced if either a high fre-  
quency AC voltage or a pulse voltage having rapid rise time  
is present in the circuit.  
1.The following diagrams and tables show some examples of recommended patterns to  
prevent excessive solder amourts.larger fillets which extend above the component  
end terminations)  
2.PCB Design  
Pattern configurations  
Design of Land-patterns)  
1. When capacitors are mounted on a PCB, the amount of  
solder usedsize of filletcan directly affect capacitor per-  
formance. Therefore, the following items must be carefully  
considered in the design of solder land patterns:  
1The amount of solder applied can affect the ability of  
chips to withstand mechanical stresses which may lead  
to breaking or cracking. Therefore, when designing  
land-patterns it is necessary to consider the appropri-  
ate size and configuration of the solder pads which in  
turn determines the amount of solder necessary to form  
the fillets.  
Examples of improper pattern designs are also shown.  
1Recommended land dimensions for a typical chip capacitor land patterns for PCBs  
Recommended land dimensions for wave-solderingunit: mm)  
2When more than one part is jointly soldered onto the  
same land or pad, the pad must be designed so that each  
component's soldering point is separated by solder-resist.  
Type  
107  
1.6  
0.8  
212  
2.0  
316  
3.2  
1.6  
325  
3.2  
2.5  
L
Size  
W
51.25  
A
0.81.0 1.01.4 1.82.5 1.82.5  
0.50.8 0.81.5 0.81.7 0.81.7  
0.60.8 0.91.2 1.21.6 1.82.5  
B
C
Recommended land dimensions for reflow-solderingunit: mm)  
Type  
042  
0.4  
0.2  
063  
0.6  
0.3  
105  
1.0  
0.5  
107  
1.6  
0.8  
212  
2.0  
316  
3.2  
1.6  
325  
3.2  
2.5  
432  
4.5  
3.2  
L
Size  
W
51.25  
A
0.150.25 0.200.30 0.450.55 0.81.0 0.81.2 1.82.5 1.82.5 2.53.5  
0.100.20 0.200.30 0.400.50 0.60.8 0.81.2 1.01.5 1.01.5 1.51.8  
0.150.30 0.250.40 0.450.55 0.60.8 0.91.6 1.22.0 1.83.2 2.33.5  
B
C
Excess solder can affect the ability of chips to withstand mechanical stresses. There-  
fore, please take proper precautions when designing land-patterns.  
Type 2124 circuits)  
2.0  
L
1.25  
W
a
b
c
d
0.50.6  
0.50.6  
0.20.3  
0.5  
Type 2122 circuits1102 circuits0962 circuits)  
L
2.0  
1.37  
1.0  
0.9  
0.6  
1.25  
W
a
b
c
d
0.50.6  
0.50.6  
0.50.6  
1.0  
0.350.45 0.250.35  
0.550.65 0.150.25  
0.30.4  
0.64  
0.150.25  
0.45  
109  
PRECAUTIONS  
2/6  
Precautions on the use of Multilayer Ceramic Capacitors  
Stages  
Precautions  
Technical considerations  
LWDC Recommended land dimensions for reflow-soldering  
4
105  
1.0  
107  
51.6  
0.8  
212  
2.0  
316  
3.2  
1.6  
Type  
W
0.52  
1.25  
L
A
B
C
0.180.22 0.250.3 0.50.7 0.8~1.0  
0.20.25 0.30.4 0.40.5 0.4~0.5  
0.91.1 1.51.7 1.92.1 3.03.4  
unit: mm)  
2.PCB Design  
2Examples of good and bad solder application  
Not recommended  
Recommended  
Items  
Mixed mounting  
of SMD and  
leaded compo-  
nents  
Component  
placement close  
to the chassis  
Hand-soldering  
of leaded  
components  
near mounted  
components  
Horizontal  
component  
placement  
Pattern configurations  
1-1. The following are examples of good and bad capacitor layout; SMD capacitors should  
Capacitor layout on panelized [breakaway] PC boards)  
1. After capacitors have been mounted on the boards, chips  
can be subjected to mechanical stresses in subsequent  
manufacturing processesPCB cutting, board inspection,  
mounting of additional parts, assembly into the chassis, wave  
soldering the reflow soldered boards etc.For this reason,  
planning pattern configurations and the position of SMD ca-  
pacitors should be carefully performed to minimize stress.  
be located to minimize any possible mechanical stresses from board warp or deflection.  
Not recommended  
Recommended  
Deflection of  
the board  
1-2. To layout the capacitors for the breakaway PC board, it should be noted that the  
amount of mechanical stresses given will vary depending on capacitor layout. The  
example below shows recommendations for better design.  
1-3. When breaking PC boards along their perforations, the amount of mechanical stress  
on the capacitors can vary according to the method used. The following methods  
are listed in order from least stressful to most stressful: push-back, slit, V-grooving,  
and perforation. Thus, any ideal SMD capacitor layout must also consider the PCB  
splitting procedure.  
111  
PRECAUTIONS  
3/6  
Precautions on the use of Multilayer Ceramic Capacitors  
Stages  
Precautions  
Technical considerations  
3.Considerations for auto-  
Adjustment of mounting machine  
1. If the lower limit of the pick-up nozzle is low, too much force may be imposed on the  
capacitors, causing damage. To avoid this, the following points should be considered  
before lowering the pick-up nozzle:  
matic placement  
1. Excessive impact load should not be imposed on the ca-  
pacitors when mounting onto the PC boards.  
2. The maintenance and inspection of the mounters should be  
conducted periodically.  
1The lower limit of the pick-up nozzle should be adjusted to the surface level of the  
PC board after correcting for deflection of the board.  
4
2The pick-up pressure should be adjusted between 1 and 3 N static loads.  
3To reduce the amount of deflection of the board caused by impact of the pick-up  
nozzle, supporting pins or back-up pins should be used under the PC board. The fol-  
lowing diagrams show some typical examples of good pick-up nozzle placement:  
Not recommended  
Recommended  
Single-sided  
mounting  
Double-sided  
mounting  
2. As the alignment pin wears out, adjustment of the nozzle height can cause chipping or  
cracking of the capacitors because of mechanical impact on the capacitors. To avoid  
this, the monitoring of the width between the alignment pin in the stopped position, and  
maintenance, inspection and replacement of the pin should be conducted periodically.  
Selection of Adhesives  
1. Some adhesives may cause reduced insulation resistance. The difference between  
the shrinkage percentage of the adhesive and that of the capacitors may result in  
stresses on the capacitors and lead to cracking. Moreover, too little or too much  
adhesive applied to the board may adversely affect component placement, so the fol-  
lowing precautions should be noted in the application of adhesives.  
1. Mounting capacitors with adhesives in preliminary assembly,  
before the soldering stage, may lead to degraded capacitor  
characteristics unless the following factors are appropriately  
checked; the size of land patterns, type of adhesive, amount  
applied, hardening temperature and hardening period.  
Therefore, it is imperative to consult the manufacturer of the  
adhesives on proper usage and amounts of adhesive to use.  
1Required adhesive characteristics  
a. The adhesive should be strong enough to hold parts on the board during the mount-  
ing & solder process.  
b. The adhesive should have sufficient strength at high temperatures.  
c. The adhesive should have good coating and thickness consistency.  
d. The adhesive should be used during its prescribed shelf life.  
e. The adhesive should harden rapidly  
f. The adhesive must not be contaminated.  
g. The adhesive should have excellent insulation characteristics.  
h. The adhesive should not be toxic and have no emission of toxic gasses.  
2The recommended amount of adhesives is as follows;  
Figure  
212/316 case sizes as examples  
0.3mm min  
a
b
c
100 120 μm  
Adhesives should not contact the pad  
113  
PRECAUTIONS  
4/6  
Precautions on the use of Multilayer Ceramic Capacitors  
Stages  
4. Soldering  
Precautions  
Technical considerations  
Selection of Flux  
1-1. When too much halogenated substanceChlorine, etc.content is used to activate  
the flux, or highly acidic flux is used, an excessive amount of residue after soldering  
may lead to corrosion of the terminal electrodes or degradation of insulation resis-  
tance on the surface of the capacitors.  
1. Since flux may have a significant effect on the performance  
of capacitors, it is necessary to verify the following condi-  
tions prior to use;  
1Flux used should be with less than or equal to 0.1 wt%  
equivelent to chrolineof halogenated content. Flux  
having a strong acidity content should not be applied.  
2When soldering capacitors on the board, the amount of  
flux applied should be controlled at the optimum level.  
3When using water-soluble flux, special care should be  
taken to properly clean the boards.  
1-2. Flux is used to increase solderability in flow soldering, but if too much is applied, a  
large amount of flux gas may be emitted and may detrimentally affect solderability. To  
minimize the amount of flux applied, it is recommended to use a flux-bubbling system.  
1-3. Since the residue of water-soluble flux is easily dissolved by water content in the  
air, the residue on the surface of capacitors in high humidity conditions may cause a  
degradation of insulation resistance and therefore affect the reliability of the compo-  
nents. The cleaning methods and the capability of the machines used should also be  
considered carefully when selecting water-soluble flux.  
4
Soldering  
1-1. Preheating when soldering  
Temperature, time, amount of solder, etc. are specified in ac-  
cordance with the following recommended conditions.  
Heating: Ceramic chip components should be preheated to within 100 to 130of the  
soldering.  
Cooling: The temperature difference between the components and cleaning process  
should not be greater than 100.  
Ceramic chip capacitors are susceptible to thermal shock when exposed to rapid or concen-  
trated heating or rapid cooling. Therefore, the soldering process must be conducted with  
great care so as to prevent malfunction of the components due to excessive thermal shock.  
Recommended conditions for soldering  
[Reflow soldering]  
Sn-Zn solder paste can affect MLCC reliability performance.  
Please contact us prior to usage.  
Temperature profile  
Temperature(℃)  
Pb free soldering)  
300  
Peak 260max  
10 sec max  
200  
100  
0
Gradually  
cooling  
Preheating  
150℃  
60 sec min  
Heating above 230℃  
40 sec max  
Ceramic chip components should be preheated to  
within 100 to 130of the soldering.  
Assured to be reflow soldering for 2 times.  
Caution  
1. The ideal condition is to have solder mass filletcontrolled to 1/2 to 1/3 of the  
thickness of the capacitor, as shown below:  
Capacitor  
Solder  
PC board  
2. Because excessive dwell times can detrimentally affect solderability, soldering du-  
ration should be kept as close to recommended times as possible.  
[Wave soldering]  
Temperature profile  
Temperature(℃)  
Pb free soldering)  
300  
Peak 260max  
10 sec max  
200  
100  
0
Gradually  
cooling  
Preheating  
150℃  
120 sec min  
Ceramic chip components should be preheated to  
within 100 to 130of the soldering.  
Assured to be wave soldering for 1 time.  
Except for reflow soldering type.  
Caution  
1. Make sure the capacitors are preheated sufficiently.  
2. The temperature difference between the capacitor and melted solder should not be  
greater than 100 to 130℃  
3. Cooling after soldering should be as gradual as possible.  
4. Wave soldering must not be applied to the capacitors designated as for reflow sol-  
dering only.  
115  
PRECAUTIONS  
5/6  
Precautions on the use of Multilayer Ceramic Capacitors  
Stages  
Precautions  
Technical considerations  
[Hand soldering]  
4. Soldering  
Temperature profile  
Temperature(℃)  
Pb free soldering)  
400  
300  
200  
350max  
3 sec max  
Gradually  
cooling  
⊿T  
4
100  
0
60 sec min  
(※1903216Type max, 1303225  
Type min)  
It is recommended to use 20W soldering iron and  
the tip is 1φor less.  
The soldering iron should not directly touch the  
components.  
Assured to be soldering iron for 1 time.  
Note: The above profiles are the maximum allowable  
soldering condition, therefore these profiles are  
not always recommended.  
Caution  
1. Use a 20W soldering iron with a maximum tip diameter of 1.0 mm.  
2. The soldering iron should not directly touch the capacitor.  
5.Cleaning  
Cleaning conditions  
1. The use of inappropriate solutions can cause foreign substances such as flux residue  
to adhere to the capacitor or deteriorate the capacitor's outer coating, resulting in a  
degradation of the capacitor's electrical propertiesespecially insulation resistance.  
2. Inappropriate cleaning conditionsinsufficient or excessive cleaningmay detrimen-  
tally affect the performance of the capacitors.  
1. When cleaning the PC board after the capacitors are all  
mounted, select the appropriate cleaning solution according  
to the type of flux used and purpose of the cleaninge.g.  
to remove soldering flux or other materials from the produc-  
tion process.)  
2. Cleaning conditions should be determined after verifying, 1Excessive cleaning  
through a test run, that the cleaning process does not affect  
the capacitor's characteristics.  
In the case of ultrasonic cleaning, too much power output can cause excessive vibra-  
tion of the PC board which may lead to the cracking of the capacitor or the soldered  
portion, or decrease the terminal electrodes' strength. Thus the following conditions  
should be carefully checked;  
Ultrasonic output  
Below 20 W/ℓ  
Below 40 kHz  
Ultrasonic frequency  
Ultrasonic washing period 5 min. or less  
6.Post cleaning processes  
1. With some type of resins a decomposition gas or chemical  
reaction vapor may remain inside the resin during the hard-  
ening period or while left under normal storage conditions  
resulting in the deterioration of the capacitor's performance.  
2. When a resin's hardening temperature is higher than the  
capacitor's operating temperature, the stresses generated by  
the excess heat may lead to capacitor damage or destruction.  
The use of such resins, molding materials etc. is not recom-  
mended.  
Breakaway PC boardssplitting along perforations)  
1. When splitting the PC board after mounting capacitors and  
other components, care is required so as not to give any  
stresses of deflection or twisting to the board.  
7.Handling  
2. Board separation should not be done manually, but by us-  
ing the appropriate devices.  
Mechanical considerations  
1. Be careful not to subject the capacitors to excessive me-  
chanical shocks.  
1If ceramic capacitors are dropped onto the floor or a  
hard surface, they should not be used.  
2When handling the mounted boards, be careful that the  
mounted components do not come in contact with or  
bump against other boards or components.  
117  
PRECAUTIONS  
6/6  
Precautions on the use of Multilayer Ceramic Capacitors  
Stages  
Precautions  
Technical considerations  
8.Storage conditions  
Storage  
1. If the parts are stored in a high temperature and humidity environment, problems  
such as reduced solderability caused by oxidation of terminal electrodes and dete-  
rioration of taping/packaging materials may take place. For this reason, components  
should be used within 6 months from the time of delivery. If exceeding the above  
period, please check solderability before using the capacitors.  
1. To maintain the solderability of terminal electrodes and to  
keep the packaging material in good condition, care must  
be taken to control temperature and humidity in the storage  
area. Humidity should especially be kept as low as possible.  
Recommended conditions  
4
Ambient temperature  
Humidity  
Below 30℃  
Below 70% RH  
The ambient temperature must be kept below 40. Even  
under ideal storage conditions capacitor electrode solder-  
ability decreases as time passes, so should be used within  
6 months from the time of delivery.  
Ceramic chip capacitors should be kept where no chlorine or  
sulfur exists in the air.  
2. The capacitance value of high dielectric constant capacitors  
type 2 &3will gradually decrease with the passage of time,  
so this should be taken into consideration in the circuit design.  
If such a capacitance reduction occurs, a heat treatment of  
150for 1hour will return the capacitance to its initial level.  
119  

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